1. Field of the Invention
This invention relates to the field of data processing systems. More particularly, this invention relates to programmable data processing systems in which an instruction decoder is responsive to program instructions to control processing logic to perform data processing operations specified by the program instructions.
2. Description of the Prior Art
It is known to provide data processing systems including an instruction decoder operable to decode program instructions to control processing logic to perform data processing operations specified by those program instructions. An example of such data processing systems are the processor cores designed by ARM Limited of Cambridge, England. It is known to provide data processing systems in which program instructions of a first instruction set, such as Java bytecodes, are translated to program instructions of a second instruction set, such as an ARM supported program instruction set. This translation may conveniently be provided by a software mechanism such as a just-in-time (JIT) translator or a dynamic adaptive translator. A problem associated with such translators is that the translated code is often considerably larger in size than the original code and thus requires a disadvantageously increased amount of memory storage space. This problem is sometimes referred to as “code bloat”.